Professional Documents
Culture Documents
Programmable Controllers
Series
22B2-E-0004f
series
シリ ーズ
2
Large
capacity/
high-speed
Performance
SPH3000MG
MG SX-Net
256K
K
PLC-MIX value Ultra-high
[Instruction/μs] SPH3000MM speed
E-SX bus
48K 256K
K
SPH3000/SPH3000D
High-
48K 96K* 128K 256K
K speed
* SPH3000D only motion
Motion
monitoring
control
32K 74K 117K 245K
K
Ethernet built-in
Monitoring
control
instrumentation
information
4
48K 56K
K
256K process
SPH2000 board type
Sequence Machine
K
8K 16K control built-in
customization
Re
ealizzation off hiigh sp
peed/the machine coontrol to be heightened
An opening point
INDEX
Overview of MICREX-SX series 2 MICREX-SX series SPH 14 Communication Module 47
Network configuration of SPH 4 General specifications 14 Function and positioning control module 76
Features of SPH 6 Power supply module 15 Programming support tool 90
Integrated programmable support 10 CPU module 16 Dimensions 109
Basic configuration of SX bus 12 Base board 28 Ordering informations 116
E-SX bus product 29 Product warranty 122
Standard I/O module 32
3
SX Bus Diverse Network Systems
Enabling Seamless Access
Open network group
Ethernet
Area controller/gateway
I/O terminal
Extension unit
E I/O terminal POD Servo system Temperature
controller
Bit level network
AS-i
Devices of other
manufacturers
Proximity Ultrasonic
switch switch
4
High-speed process and distributed arrangement of the E-SX bus and
the SX bus allow seamless connections with control indicators and
Original network group
inverter servos. Various open network systems such from a small-
scale application built in a machine to a hierarchical distributed system
of large-scale line and facility devices can be constructed.
FUJI controllers
MICREX-NX series
SX-Net MICREX-F series
P/PE-link
SPH3000MG SPH3000MM
Servo system
5
Realizes High-Speed Advanced Machine Control
Ultra-high-speed 1 ms controller
Tact cycle
1, 2, ……10 ms
Tact cycle
E-SX bus
Tact cycle 0.25 ms 0.375 ms 0.5 ms 1 ms 1.5 ms 2 ms
Max. I/O size 4 stations 67 words 256 words 512 words 2048 words 2048 words 4096 words
(Number of I/O stations) 16 stations - - 256 words 1024 words 1024 words 1024 words
32 stations - - - 512 words 2048 words 2048 words
64 stations - - - - 512 words 1024 words
SX bus
Tact cycle 0.25 ms 0.375 ms 0.5 ms 1 ms 1.5 ms 2 ms
Max. I/O size - - 64 words 128 words 256 words 512 words
6
Programmable Controller
SX bus
±1μs or less
Distance
[Between stations] [Total distance]
25m 25m
8
Programmable Controller
Channel 1
E-SX bus
Loopback function
Communication is continued by the signal repeater
function even when a wire is broken.
Inverter VG Inverter VG
I/O terminal
9
Improves Programming Development Efficiency
Two Types of Programming Support Tools in Accordance with Development Style
Usage
Improvement of software development Programming of the same techniques as those
efficiency of microcomputers and personal computers
Programming in units of POU or worksheets allows the use The ST language is similar to the C language so that pro-
of the structured design method by which a program is cre- grams can be created using the same techniques as those
ated by dividing it by functionality or process. This method of microcomputers and personal computers for complex
enables multiple designers to divide the program design calculations that are hard to implement using the Ladder
among them so that a substantial reduction in the program language. Programs and circuits that are frequently used
creation time can be achieved. can easily be reused by making them FB (function blocks).
Features
10
Programmable Controller
Usage
Ladder operation for on-site maintenance Utilization of programming resources
personnel
Supports the full keyboard operations useful for on-site Program and comment resources of the models MICREX-
maintenance personnel. F series and FLEX-PC series of Fuji Electric can be reused.
Editing and download can be performed immediately after Screens, operability, and programming can be handled as if
activation. you were using a personal computer loader with which you
are already familiar.
Features
Ultra-high-speed SX bus preserves distributed installation and expandability up to 254-module direct bus connection.
Module Type
Type A Type B Type C
· OPCN-1 master module (NP1L-JP1) · Web module (NP1L-WE1)
· OPCN-1 slave module (NP1L-JS1) · Ethernet module (NP1L-ET1)
· DeviceNet master module (NP1L-DN1) · FL-net module (NP1L-FL3) All modules other than
· DeviceNet slave module (NP1L-DS1) · P-link module (NP1L-PL1) those of Type A and B
· PROFIBUS-DP master module (NP1L-PD1) · PE-link module (NP1L-PE1) * The AS-i master module
· PROFIBUS-DP slave module (NP1L-PS1) · LE-net module (NP1L-LE1) is also included in category
· T-link master module (NP1L-TL1) · LE-net loop2 module (NP1L-LL2) C.
· T-link slave module (NP1L-TS1) · General purpose communication module (NP1L-RS1/RS2/RS3/RS4/RS5)
· Remote terminal master/slave module (NP1L-RM1) · Memory card I/F module (NP1L-MM1)
12
Programmable Controllers
series
Contents
13
Programmable Controllers
series
General Specifications
¢General specifications
Item Specifications
Physical Operating ambient temperature 0 to +55˚C IEC 61131-2
environment Storage temperature -25 to +70˚C JIS B 3502
Relative humidity 20 to 95%RH (without condensation)
Contamination degree Contamination degree 2 (free from conductive dust)
Corrosion resistance No corrosive gas is present, no organic solvent adhesion
Operating altitude Altitude of 2000 m or less (air pressure of 70 kPa or higher during transportation)
Mechanical Resistance to vibration One amplitude: 0.15 mm, constant acceleration: 19.6 m/s 2, 2 hours for each direction, 6 hours total
operating condition Resistance to shock Peak acceleration: 147 m/s2, 3 times for each direction
Electrical Electrostatic discharge Contact discharge ±6 kV IEC 61000-4-2
operating Aerial discharge ±8 kV JIS C 61000-4-2
condition Radiative radio frequency 80 to 1000 MHz 10 V/m IEC 61000-4-3
electromagnetic field 1.4 to 2.0GHz 3 V/m JIS C 61000-4-3
2.0 to 2.7GHz 1V/m
Fast transient burst Power supply line and I/O signal line (AC non-shield line): ±2 kV IEC 61000-4-4
Communication line and I/O signal line (except for AC non-shielded line): ±1 kV JIS C 61000-4-4
Surge AC power supply: Common mode ±2 kV, normal mode: ±1 kV IEC 61000-4-5
DC power supply: Common mode ±0.5 kV, normal mode: ±0.5 kV JIS C 61000-4-5
Radio frequency electromagnetic field 150 kHz to 80 MHz, 10 V IEC 61000-4-6
Conducted interference JIS C 61000-4-6
Power frequency magnetic field 50 Hz, 30 A/m IEC 61000-4-8
JIS C 61000-4-8
Square wave impulse noise ±1.5 kV, 1ns rising edge, 1 μs pulse width, 50 Hz
Structure Open Type device (Built-in control panel type)
Cooling method Natural cooling
14
Programmable Controllers
series
Power Supply Module
15
Programmable Controllers
series
CPU Module
¢Performance specifications
SPH300 SPH300EX
Model NP1PS-32 NP1PS-32R NP1PS-74R NP1PS-117R NP1PS-245R NP1PS-74D
Control system Stored program
Cyclic scanning system (default task), periodic task, event task
I/O connection method Direct connection I/O (SX bus), remote I/O (DeviceNet, OPCN-1, and other remote I/O links)
I/O control system SX bus: Tact synchronization refresh.
Remote I/O link: Refresh by a remote master at 10-ms fixed intervals (not synchronized with scan)
CPU 32-bit OS processor, 32-bit execution processor
Programming language IEC 61131-3 conformed
IL language (Instruction List), ST language (Structured Text), LD language (Ladder Diagram) FBD language (Function Block Diagram),
SFC element (Sequential Function Chart)
Instruction Sequence 20 ns or more/instruction
execution instruction
speed Applied instruction 40 ns or more/instruction
No. of I/O points 8,192 points
User memory 97 Kwords 277 Kwords 491 Kwords 1,003 Kwords 277×2+6 Kwords
Program memory 65,536 words 151,552 words 239,616 words 501,760 words 151,552×2 words
32,768 steps 75,776 steps 119,808 steps 250,880 steps 75,776×2 steps
Data memory 33,792 words 132,096 words 263,168 words 525,312 words 132,096 × 2 + 6,144 words
Available basic data type *1 BOOL, INT, DINT, UINT, UDINT, REAL, TIME, DATE, TOD, DT, STRING, WORD, DWORD
Number of tasks *2 Default tasks (Cyclic scanning): 1 The tasks shown to the left are
Periodic task : 4 available to each of the basic
Event tasks : 4 Up to 4 in total CPU and extension CPU.
No. of POUs in program 2000 (including POUs in the library)
Interface User ROM card -
*2 (CF/SD) CF CARD CF CARD CF CARD CF CARD CF CARD
USB *3 -
Ethernet *4 - - - - - -
Diagnostic function Self-diagnosis (memory check, ROM sum check), system configuration monitoring, module fault monitoring
Security function Set limits to download/upload of the projects, reference, and clear etc., by the password.
Calendar Up to 31 Dec. 2069 23:59:59 Precision : 27sec/month (when active)
When multi-CPU system is used, time is synchronized.
Battery backup *6 Backup range: Data memory, calendar IC memory, RAS area
Battery used: Lithium primary battery
Backup time (at 25˚C) NP1PS-32/32R: 5 years
NP1PS-74R/117R: Approx. 1.3 years
NP1PS-245R: Approx. 0.7 years Using the optionally available large-capacity battery
NP1PS-74D: Approx. 0.65 years makes the backup time two to three times longer.
Replacement time (at 25°C): within 5 minutes
Memory backup by flash memory Application programs, system definitions, and ZIP files can be saved in the flash memory built in the CPU.
Memory backup by user ROM card Application programs, system definitions, zip files, compressed projects and User's data can be saved in user ROM card (compact flash card).
(optional)
No. of occupied slots 1 slot 2 slots
Internal current consumption 24 V DC, 200 mA or less
Weight Approx. 200 g Approx. 220 g Approx. 410 g
16
Programmable Controllers
series
CPU Module
SPH2000 SPH200
NP1PM-48R NP1PM-48E NP1PM-256E NP1PM-256H NP1PH-08 NP1PH-16 Model
Stored program Control system
Cyclic scanning system (default task), periodic task, event task
Direct connection I/O (SX bus), remote I/O (DeviceNet, OPCN-1, and other remote I/O links) I/O connection method
SX bus: Tact synchronization refresh. I/O control system
Remote I/O link: Refresh by a remote master at 10-ms fixed intervals (not synchronized with scan)
32-bit RISC processor 16-bit OS processor, 16-bit execution processor CPU
IEC 61131-3 conformed Programming language
IL language (Instruction List), ST language (Structured Text), LD language (Ladder Diagram) FBD language (Function Block Diagram),
SFC element (Sequential Function Chart)
30 ns or more/instruction 70 ns or more/instruction Sequence Instruction
instruction execution
40 ns or more/instruction 140 ns or more/instruction Applied instruction speed
8,192 points No. of I/O points
193 Kwords 2,561 Kwords 29 Kwords 57 Kwords User memory
98,304 words 524,288 words 16,384 words 32,768 words Program memory
49,152 steps 262,144 steps 8,192 steps 16,384 steps
99,328 words 2,098,176 words 13,312 words 25,600 words Data memory
BOOL, INT, DINT, UINT, UDINT, REAL, TIME, DATE, TOD, DT, STRING, WORD, DWORD Available basic data type *1
Default tasks (Cyclic scanning): 1 Number of tasks *2
Periodic task : 4
Event tasks : 4 Up to 4 in total
2000 (including POUs in the library) No. of POUs in program
ROM for SPH200 ROM for SPH200 User ROM card Interface
CF CARD CF CARD CF CARD CF CARD (CF/SD) *2
- - USB *3
- *5 - - Ethernet *4
Self-diagnosis (memory check, ROM sum check), system configuration monitoring, module fault monitoring Diagnostic function
Set limits to download/upload of the projects, reference, and clear etc., by the password. Security function
Up to 31 Dec. 2069 23:59:59 Precision: 27sec/month (when active) Up to 31 Dec. 2069 23:59:59 Calendar
When multi-CPU system is used, time is synchronized. Precision: 27 seconds/month
Backup range: Data memory, calendar IC memory, RAS area Backup range: Application program Battery backup *6
Battery used: Lithium primary battery system definition, ZIP file, data memory,
Backup time (at 25˚C): 5 years calendar IC memory, RAS area
Replacement time (at 25°C): within 5 minutes Battery used: Lithium primary battery
Backup time (at 25˚C): 5 years
Replacement time (at 25°C): within 5 minutes
Application programs, system definitions, and ZIP files can be saved in the flash memory built in the Application programs, system definitions, and ZIP Memory backup by flash memory
CPU. files can be saved in the user ROM card.
Application programs, system definitions, zip files, compressed projects and User's data can be saved Application programs, system definitions, and ZIP Memory backup by user ROM card
in user ROM card (compact flash card). files can be saved. (optional)
1 slot No. of occupied slots
24 V DC, 200 mA or less 24 V DC, 85 mA or less Internal current consumption
Approx. 220 g Approx. 170 g Weight
17
Programmable Controllers
series
CPU Module
¢Performance specifications
SPH3000 SPH3000D
Model NP1PU-048E NP1PU-128E NP1PU-256E NP1PU-048EZM NP1PU-096EZM NP1PU-0128EZM NP1PU-256EZM
Control system Stored program
Cyclic scanning system (default task), periodic task, event task
I/O connection method Direct connection I/O (SX bus), remote I/O (DeviceNet, OPCN-1, and other remote I/O links)
I/O control system SX bus: Tact synchronization refresh.
Remote I/O link: Refresh by a remote master at 10-ms fixed intervals (not synchronized with scan)
CPU 32-bit RISC processor
Programming language IEC 61131-3 conformed
IL language (Instruction List), ST language (Structured Text), LD language (Ladder Diagram) FBD language (Function Block Diagram),
SFC element (Sequential Function Chart)
Instruction Sequence 9 ns or more/instruction
execution instruction
speed Applied 8 ns or more/instruction
instruction
No. of I/O points 8,192 points
SX bus 8,192 points
E-SX bus0/E-SX bus1 -
User memory 353 Kwords 1,281 Kwords 2,561 Kwords 545 Kwords 1,409 Kwords 1,473 Kwords 2,753 Kwords
Program memory 98,304 words 262.144 words 524,288 words 98,304 words 196,608 words 262,144 words 524,288 words
49,152 steps 131,072 steps 262,144 steps 49,152 steps 98,304 steps 131,072 steps 262,144 steps
SX bus 98,304 words 262,144 words 524,288 words 98,304 words 196,608 words 262,144 words 524,288 words
49,152 steps 131,072 steps 262,144 steps 49,152 steps 98,304 steps 131,072 steps 242,144 steps
E-SX bus0/E-SX bus1 -
-
Data memory 263,168 words 1,049,600 words 2,098,176 words 459,776 words 1,246,208 words 1,246,208 words 2,294,784 words
SX bus 263,168 words 1,049,600 words 2,098,176 words 459,776 words 1,246,208 words 1,246,208 words 2,294,784 words
E-SX bus0/E-SX bus1 -
Available basic data type *1 BOOL, INT, DINT, UINT, UDINT, REAL, TIME, DATE, TOD, DT, STRING, WORD, DWORD
Number of tasks SX bus
Default tasks (Cyclic scanning): 1
Periodic task : 4
Event tasks : 4 Up to 4 in total
No. of POUs in program 2000 (including POUs in the library)
Interface User ROM card
(CF/SD) SD memory card
USB *2
Ethernet *3
Diagnostic function Self-diagnosis (memory check, ROM sum check), system configuration monitoring, module fault monitoring
Security function Set limits to download/upload of the projects, reference, and clear etc., by the password.
Calendar Up to 31 Dec. 2069 23:59:59 Precision: 27sec/month (when active)
When multi-CPU system is used, time is synchronized.
Battery backup Backup range: Data memory, calendar IC memory, RAS area
Battery used: Lithium primary battery
Backup time (at 25˚C): 5 years
Replacement time (at 25°C): within 5 minutes
Memory backup by flash memory Application programs, system definitions, and ZIP files can be saved in the flash memory built in the CPU.
Memory backup by user ROM Application programs, system definitions, zip files, compressed projects and User's data can be saved in user ROM card (compact flash card).
card (optional)
No. of occupied slots 1 slot
Internal current consumption 24 V DC, 200 mA or less
Weight Approx. 220 g
18
Programmable Controllers
series
CPU Module
¢Performance specifications
SPH3000MM SPH3000MG
Model NP1PU2-048E NP1PU2-256E NP1PU1-256NE
Control system Stored program
Cyclic scanning system (default task), periodic task, event task
I/O connection method Direct connection I/O (SX bus), remote I/O (DeviceNet, OPCN-1, and other remote I/O links)
I/O control system SX bus: SX bus tact synchronization refresh.
E-SX bus: E-SX bus tact synchronization refresh.
Remote I/O link: Refresh by a remote master at 10-ms fixed intervals (not synchronized with scan)
CPU 32-bit RISC processor × 3 32-bit RISC processor × 2
Programming language IEC 61131-3 conformed
IL language (Instruction List), ST language (Structured Text), LD language (Ladder Diagram) FBD language (Function Block Diagram),
SFC element (Sequential Function Chart)
Instruction Sequence 9 ns or more/instruction 6 ns or more/instruction
execution instruction
speed Applied 8 ns or more/instruction 5 ns or more/instruction
instruction
No. of I/O points 139,264 points 73,728 points
SX bus 8,192 points
E-SX bus0/E-SX bus1 65,536/65,536 points 65,536 points
User memory 1234.5 Kwords 5650.5 Kwords 2,889.5 Kwords
Program memory 196,608 words 1,048,576 words 524,288 words
98,304 steps 524,288 steps 262,144 steps
SX bus -
-
E-SX bus0/E-SX bus1 98,304/98,304 words 524,288/524,288 words 524,288 words
49,152/49,152 steps 262,144/262,144 steps 262,144 steps
Data memory 1,067,520 words 4,737,536 words 2,434,560 words
SX bus 132,608 words 132,608 words 132,096 words
E-SX bus0/E-SX bus1 467,456/467,456 words 2,302,464/2,302,464 words 2,302,464 words
Available basic data type *1 BOOL, INT, DINT, UINT, UDINT, REAL, TIME, DATE, TOD, DT, STRING, WORD, DWORD
Number of tasks *2 E-SX bus0/E-SX bus1 E-SX bus 0
Default tasks (Cyclic scanning): 1 Default tasks
Periodic task : 4 (Cyclic scanning): 1
Event tasks : 4 Up to 4 in total Periodic task : 4 Up to 4
Event tasks : 4 in total
No. of POUs in program 2000 (including POUs in the library)
Interface User ROM card
(CF/SD) SD memory card
USB *3
Ethernet *4
Diagnostic function Self-diagnosis (memory check, ROM sum check), system configuration monitoring, module fault monitoring
Security function Set limits to downloading/uploading of the projects, reference, and clear etc., with a password.
Calendar Up to 31 Dec. 2069 23:59:59 Precision: 27sec/month (when active)
When multi-CPU system is used, time is synchronized.
Battery backup Backup range: Data memory, calendar IC memory, RAS area
Battery used: Lithium primary battery
Backup time (at 25˚C): 5 years
Replacement time (at 25°C): within 5 minutes
Memory backup by flash memory Application programs, system definitions, and ZIP files can be saved in the flash memory built in the CPU.
Memory backup by user ROM Application programs, system definitions, zip files, compressed projects and User’s data can be saved in user ROM card (compact flash card).
card (optional)
No. of occupied slots 2 slots
Internal current consumption 24 V DC 360 mA 24 V DC 650 mA
Weight Approx. 420 g Approx. 450 g
19
Programmable Controllers
series
CPU Module
SPH2000 SPH200
Model NP1PM-48R NP1PM-48E NP1PM-256E NP1PM-256H NP1PH-08 NP1PH-16
User memory 193 Kwords 2,561 Kwords 29 Kwords 57 Kwords
Program memory 98,304 words 524,288 words 16,384 words 32,768 words
49,152 steps 262,144 steps 8,192 steps 16,384 steps
Data memory 99,328 words 2,098,176 words 13,312 words 25,600 words
I/O memory 512 words
Non-retain memory 65,536 words 1,703,936 words 4,096 words 8,192 words
Retain memory 8,192 words 237,568 words 2,048 words 4,096 words
User FB memory 8,192 words 73,728 words 2,048 words 4,096 words
System FB memory 16,384 words 81,920 words 4,096 words 8,192 words
Edge detection 1,024 points 5,120 words 256 points 512 points
Counter 256 points 1,280 words 64 points 128 points
Integrating timer 128 points 640 words 32 points 64 points
Timer 512 points 2,560 words 128 points 256 points
Others 8,192 words 40,960 words 2,048 words 4,096 words
System memory 512 words
Common memory -
Note: Area sizes of the non-retain memory, the retain memory, the user FB memory and the system FB memory can be changed.
20
Programmable Controllers
series
CPU Module
SPH3000D
Type NP1PU-048EZM NP1PU-096EZM NP1PU-256EZM NP1PU-256EZM
User memory 545 k words 1,409 k words 1,473 k words 2,753 k words
Program memory 98,304 words 196,608 words 262,144 words 524,288 words
49,152 steps 98,304 steps 131,072 steps 262,144 steps
SX bus 98,304 words 196,608 words 262,144 words 524,288 words
49,152 steps 98,304 steps 131,072 steps 262,144 steps
E-SX bus 0 –
–
E-SX bus 1 –
–
Data memory 459,776 words 1,246208 words 1,246,208 words 2,294,784 words
SX bus 459,776 words 1,246208 words 1,246,208 words 2,294,784 words
I/O memory 512 words
Non-retain memory 98,304 words 786,432 words 786,432 words 1,703,936 words
Retain memory 40,960 words 122,880 words 122,880 words 237,568 words
User FB memory 172,032 words 188,416 words 188,416 words 204,800 words
System FB memory 147,456 words
Edge detection 10,240 points
Counter 6,144 points
Integrating timer 1,024 points
Timer 6,144 points
Others 45,056 words
System memory 512 words
Note: Area sizes of the non-retain memory, the retain memory, the user FB memory and the system FB memory can be changed.
21
Programmable Controllers
series
CPU Module
Note: Area sizes of the non-retain memory, the retain memory, the user FB memory and the system FB memory can be changed.
22
Programmable Controllers
series
CPU Module
¢Features
• Mass equalization data • Redundant multi-CPU system enabled
Up to 320 Kwords of data can be equalized. Up to 4 multi-CPUs can be used for redundancy in multi-
• High-speed transmission through dedicated equalization bus CPU (distributed processing) systems.
100 Mbps dedicated equalization bus transmits the equalization • Easy equalization setting
data. Also, as a connection cable, a commercially available Equalization area can be set up on a per-FB instance basis
LAN cable (shielded category 5, cross connect cable) is used. in addition to on a per-variable basis.
• Module exchangeable during running CPU • System configuration with standard modules enabled
A failed CPU module can be exchanged without stopping the Standard modules allow you to construct systems such as
system by using a hot pluggable base board. power supplies, base boards and I/O modules.
<CPU redundancy on another base board> <CPU redundancy on the same base board>
Backup system
SX bus SX bus
<Operation overview>
• CPU module redundancy
SPH2000 supports “1:1 redundancy” which allows you to equalize the data and continue operation without stopping the system.
Data equalization rate is up to 320 Kwords/250 ms (equalization bus transmission rate: 100 Mbps) using dedicated "equalization bus."
• Power supply module redundancy
When two power supply modules are mounted on the same base board, the power supply modules run in parallel, and each
module supplies 50% of the electric power.
When an error occurs in one of the power supply modules, the normally running power supply module supplies 100% of the electric power.
23
Programmable Controllers
series
CPU Module
¢Features
• Large scale • High speed
The network enables 126 nodes to be connected per The settable shortest network scan interval is 0.5 ms
system. (0.5 ms steps, up to 30 ms).
• Large capacity
The network allows 128 Kwords (2,048 blocks in total in the
unit of 64 words) as common memory space per system.
¢SX-Net specifications
Item Specifications
No. of connectable modules 126 units
Station number setting range 1 to 126
Scan interval 0.5 ms to 30 ms (0.5 ms steps)
(This depends on the number of connected modules,
distance, total data quantity, and the number of hubs.)
Common 1-slot transmission size 512 W
memory
1-slot transmission time 30 us
function
Maximum number of slots 256 slots
Data area size 128 KW (64 * 2048 blocks)
Area definition 64 W fixed-block selection method
Unit of data guarantee Unit of station occupation
Area update timing At the time of each scan (Batch transfer of area data)
Message Type Unicast message (1 to 1)
function
Broadcast message (1 to N)
Size 1024 bytes
24
Programmable Controllers
series
CPU Module
Two in One Sequence control and motion control are realized with only one CPU.
• Expensive special motion modules are unnecessary. You can save money to a large extent.
• The work efficiency is substantially improved because the sequence and motion are supported with only one programming tool.
(SX-Programmer Expert (D300win))
Conventional system New system Personal computer loader
Sequence Motion 1 loader
1 CPU
Motion FB
Improved development efficiency
Speed control %
FB 100 Significant reduction in
program development
80 man-hours through
adoption of control FBs.
Electronic cam
60
FB
40
25
Programmable Controllers
series
CPU Module
Added
26
Programmable Controllers
series
CPU Module
¢Appearance
s 30( NP1PH-08/NP1PH-16) s 30( NP1PS-32R/NP1PS-74R/NP1PS-117R/NP1PS-245R) s 30(%8 NP1PS-74D)
3TATUS INDICATION ,%$
#05 MODES
3TATUS ,%$
#05 MODES SWITCH 3TATUS INDICATION ,%$ OF THE EXTENSION #05
SWITCH OF THE BASIC #05
INDICATOR 5SER 2/- 3TATUS ,%$ #05 .O
#05 .O CARD OPTION INDICATOR SETUP SWITCH
SETUP SWITCH #05 MODES
#05 .O SETUP SWITCH SWITCH
TERM
UROM
3PECIFICATION RUN ONL
ERR
ONL
ERR
%XTENSION 38 BUS
5SER 2/- CARD 3PECIFICATION NAME PLATE UROM
,OADER NAME PLATE CONNECTOR COVER
RUN RUN
3PECIFICATION NAME PLATE
SIDE PANEL OF MODULE 5SER 2/- ALM ALM
CONNECTOR #ONNECTOR STOP BAT
SIDE PANEL OF MODULE
CARD OPTION
COVER BCD
8 9A
,OADER CONNECTOR
EF 12
CPU
0
No.
67
6ERSION
34 5
,OADER
5SER 2/- CARD LOADER
CONNECTOR
DISPLAY EJECT BUTTON ,OADER CONNECTOR COVER 5SER 2/- CARD EX SX-BUS
CONNECTOR COVER OUT
5SER 2/- "ATTERY 53"
"